This role represents individual contributor within the CHS Signal Integrity organization responsible for end-to-end SI/PI architecture, analysis, and signoff for next-generation mobile, compute, Automotive and various other connectivity platforms.
The engineer acts as
System SI/PI owner across full platform (SoC ↔ package ↔ board ↔ connectors ↔ external systems)
Technical owner for high-speed interfaces and system margins
Cross-functional leader driving SIPI driven design convergence across silicon, package, and platform teams
Core Responsibilities
Own end-to-end SI/PI closure for programs (pre-silicon → post-silicon → production)
Define design targets and layout design guidelines for all high-speed interfaces
Influence architecture decisions early in product lifecycle
Ensure SI/PI alignment with product KPIs (performance, yield, power, cost)
Drive new IP co-design across IC/IO/PHY, package, and PCB
Ensure compliance to standards (JEDEC, PCI-SIG, MIPI, IEEE)
Influence PDN architecture definition at system and package level, provide related optimum cost solutions
Ensure cross functional alignments. Partner with SoC/PHY design teams, Package engineering, Board/system teams and OEM/ODM ecosystem
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12+ years in Signal Integrity / Power Integrity / High-speed systems
Proven ownership of multiple tapeouts or high-volume products
Domain Expertise
Deep expertise in Transmission line theory, EM fundamentals, SI/PI interactions and jitter/noise coupling. Strong hands-on experience with: Tools: HFSS, ADS, Sigrity, CST, SIwave, HSPICE; Measurement: VNA, TDR, real-time scopes
Preferred Differentiators
Experience with: Packaging technologies like FCBGA, 2.5D/3D; Products like Data center, Compute and Servers
Track record of Patents, standards contributions, or published work internal / external conferences
you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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If you would like more information about this role, please contact Qualcomm Careers.
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