Infra Power Design Verification Sr Staff Engineer
Qualcomm
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
Key Responsibilities:
- Develop and maintain UVM-based verification environments for high-speed interconnect protocols (PCIe, CXL, AXI).
- Create and execute verification plans for high-speed interconnect protocols including PCIe, CXL, AXI, and CHI.
- Perform block-level and top-level verification, including functional coverage, assertion-based verification, and regression testing.
- Collaborate with RTL designers, architects, and validation teams to ensure design correctness and coverage closure.
- Work closely with design and architecture teams to understand specifications and derive verification strategies.
- Use third-party VIPs (e.g., Synopsys, Mentor) for protocol compliance and simulation.
- Implement and enhance scoreboards, agents, monitors, and sequences.
- Integrate and validate SMMU and Coresight components in Subsystem environments.
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