Synthesis- Lead /Staff Engineer

In this position, the engineer will be responsible for Synthesis and low power implementation bring up of power complex SoC

• Knowledgeable with physical and power aware synthesis techniques, and fluent with multi voltage designs
• Knowledgeable with balancing between power, performance, area and verification priority approaches at synthesis
• Work with design to bring out pre layout timing challenges and constraint feedback
• Proficient with pre and post layout netlist low power qualification for SoC flat and Sub system level
• Closely collaborate with DFT team for enabling latest MBIST and DFT scan insertion
• Closely work with Physical Design (PD) to bring out low power implementation issues and fixes
• Proficient in scripting languages (TCL, Perl, Python, shell)

In addition, below experience will be a value add

• Good knowledge on design data management aspects such as perforce and clearcase
• Logical equivalence check between RTL to Netlist and Netlist to Netlist
• Knowledgeable with physical and power aware implementation techniques, and fluent with multi voltage designs
• Knowledgeable with lower tech node timing derating and
• Mentoring junior engineers in different areas of timing flows and methodologies

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

7+ yrs of experience

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