Senior Principal Engineer, Physical Design Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

About the Role:

As an SoC Chip Lead, you will lead SoC execution from spec to silicon across domains. You will be responsible to drive technical strategy and execution for complex SoCs and digital systems, drive product and technology roadmaps, architecture for mission-critical projects and serve as a technical authority within the organization. This position requires exceptional expertise across multiple domains and the ability to influence business direction while delivering on the product actualization.

Key Responsibilities:

Technical Strategy & Architecture

- Drive Product Strategy: Define long-term product and technology roadmaps for complex SoCs and systems.

- Select IP & Nodes: Lead technical IP assessments, vendor selection, and foundry technology node evaluations.

- Define Architecture: Author and drive top-level SoC definitions alongside business and architecture teams, including fabric interconnects (NoC), memory hierarchies, power management, and micro-architecture.

Silicon Execution & Sign-off

- Own the Lifecycle: Lead SoC execution from initial concept through definition, tape-out, and final productization.

- Optimize PPA: Ensure all silicon milestones meet strict Power, Performance, Area, and Cost (PPA) requirements.

- Govern Silicon Sign-off: Drive final sign-off reviews for synthesis, DFT, constraints, timing closure, and physical design tape-out.

Cross-Functional Leadership & Collaboration

- Unify Engineering Domains: Direct and collaborate closely with all core hardware engineering functions, including Design (RTL), Verification (DV), DFT, Physical Design (PD), Power, and Silicon Validation (SiVal).