Senior Engineer, Research Science Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

We are seeking a highly motivated Senior Engineer to develop, calibrate, and optimize compact models for bulk CMOS, BJT, and LDMOS devices used in RF, analog, automotive, and high-voltage applications. The successful candidate will combine expertise in semiconductor device physics, compact modeling, and AI/ML techniques to develop next-generation modeling methodologies and automation workflows. This position is part of Analog Devices’ Engineering Enablement organization based in Bangalore, India.

The role demands strong expertise in semiconductor device physics, circuit simulation, and industry‑standard compact models such as BSIM4, BSIM-BULK, PSP, and Mextram. The engineer will also be responsible for building and applying machine‑learning‑based modeling methodologies. This role combines device characterization, compact model development, and machine-learning methodologies to address challenging semiconductor modeling problems and improve modeling productivity.

Our global device‑modeling team consists of approximately 20 engineers located across various ADI sites. We are a diverse group of talented professionals, serving as the critical link between the process development teams and circuit designers. The team offers excellent opportunities for technical growth, innovation, and collaboration across global ADI organizations.

Responsibilities include, but are not limited to:

• Develop, enhance, and maintain compact models for CMOS, BJT, and LDMOS devices.

• Create semiconductor device compact models for SPICE simulators.

• Validate and correlate compact models against measured device data.