RTL Performance Analysis Architect

Join the Bangalore-based Infrastructure IP Performance Modeling, Verification, and Analysis team as an RTL Performance Analysis Architect. As part of the Infrastructure RTL Analysis and Optimization (I-RAO) team and a broader global performance organization, you will influence architecture and design decisions across Snapdragon-based SoCs for mobile, automotive, XR/VR, server, and AI products. The role spans early architectural exploration, microarchitectural analysis, RTL performance correlation, pre-silicon bottleneck identification, design optimization, and production-hardware tuning. You will analyze infrastructure IPs—including memory controllers, emerging compute-in-memory technologies, cache controllers, memory management units (MMUs), PCIe and CXL controllers, compression IPs, and interconnects—and have opportunities to contribute to patents and technical publications.

Responsibilities

- Characterize representative workloads and use cases to identify performance bottlenecks across CPUs, GPUs, multimedia engines, SMMUs, CXL, networks-on-chip (NoCs), cache controllers, and memory controllers.

- Collaborate with architecture, design, and modeling teams to evaluate enhancements for next-generation memory controllers, last-level caches, interconnects, and related infrastructure IPs.

- Analyze power-and-performance (PnP) tradeoffs and propose architectural or microarchitectural improvements that increase efficiency.

- Define targeted pre-silicon performance analysis strategies and test plans that expose design bottlenecks early.

- Develop simulation-scale workloads, monitors, and analysis flows for SystemVerilog/UVM-based pre-silicon environments.

Core Qualifications

- Bachelor’s degree in Engineering, Information Systems, Computer Science, or a related field.

- Strong foundation in computer architecture and microarchitecture, supported by rigorous analytical and problem-solving skills.

- Two to ten years of experience in digital design, performance analysis, or functional verification.

- Experience investigating performance and microarchitectural behavior in complex hardware blocks such as memory controllers, CPUs, GPUs, NoCs, or multimedia subsystems.

- Ability to identify system-level performance bottlenecks, develop evidence-based hypotheses, and communicate actionable recommendations.