Formal Verification Engineer, Staff

Job Description

We are seeking a highly motivated Formal Verification Lead Engineer with 8 years of experience to join our GCAD Formal team. The ideal candidate will have strong formal verification fundamentals, hands-on experience with formal tools, excellent analytical and scripting skills, and the ability to drive innovative verification methodologies. This role provides the opportunity to collaborate across global architecture, design, and systems teams to influence and strengthen verification sign‑off quality.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Key Responsibilities

- Drive formal verification of complex design blocks using advanced Formal Apps and robust convergence strategies to achieve exhaustive and high‑confidence sign‑off.

- Collaborate with worldwide architecture, design, and systems teams to achieve verification goals.

- Review and refine formal setups, proofs, constraints, and abstractions with design/DV teams.

- Engage with EDA vendors and evaluate advanced DV methodologies to improve sign‑off quality.

- Develop automation scripts (Python preferred) to enhance efficiency and scalability of FV flows.

- Analyze challenging formal problems and propose effective verification strategies.

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Minimum Qualifications

- 4–6 years of hands-on experience in Formal Verification.Strong understanding of formal concepts, proof strategies, and abstraction techniques.