Design, implement, and optimize firmware-level device drivers for LPDDR5/6 DRAM controllers and associated memory subsystems; memory interconnects are proprietary to the platform — no prerequisite knowledge of specific interconnect protocols required.
Develop and enhance performance monitoring software to track memory controller metrics, bandwidth utilization, latency profiles, and hardware performance counters.
Develop and enhance drivers for memory-mapped I/O, DMA engines, cache controllers, and related peripherals.
Write clean, maintainable, and well-documented driver code in Python, C, and Rust (in order of priority).
Implement register-level programming from hardware specifications and datasheets.
Optimize driver performance for latency, throughput, and power across target SoC/FPGA platforms.
Integration & Bringup
Integrate device drivers with firmware stacks, bootloaders, and RTOS/bare-metal environments.
Support hardware bringup activities; collaborate with hardware design and ASIC teams during bring-up phases.
Port or adapt drivers across different SoC platforms and board configurations.
Testing & Validation
Design and execute comprehensive driver test plans covering functional correctness, stress, boundary conditions, and negative scenarios.
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Develop Python-based test automation scripts and frameworks for driver validation.
Use hardware debug tools such as JTAG debuggers, logic analyzers, and oscilloscopes to validate signal integrity and protocol compliance.
Write unit tests and integration tests; contribute to CI/CD pipelines for firmware.
Root Cause Analysis & Debugging
Independently investigate and resolve complex driver-level bugs including memory access faults, data corruption, race conditions, and timing violations.
Analyze memory dumps, trace logs, and register states to isolate root causes.
Document root-cause findings and corrective actions clearly for cross-functional teams.
Documentation & Collaboration
Produce thorough design documents, driver interface specifications, and API documentation.
Read and interpret hardware datasheets, register maps, timing diagrams, and JEDEC LPDDR5/6 specifications independently.
Collaborate with hardware engineers, system architects, and firmware teams to define and refine driver requirements.
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