Design Implementation Synthesis Engineer, Staff / Sr Staff

Job Description:

- Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.

- Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.

- Experience in all aspects of timing closure for multi-clock domain designs.

- Should be familiar with MCMM synthesis and optimization.

- Should have good understanding of low-power design implementation using UPF.

- Experience with scripting language such as Perl/ Python, TCL.

- Experience with different power optimization flows or technique such as clock gating.

- Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation

- Should be able to handle ECOs and formal verification and maintain high quality matrix

- 8+ yrs experience

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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