Analog Mask Design Engineer
NVIDIA
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! We are looking for a Analog Mask Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenging analog circuit designs.
What you'll be doing:
- Execute IC layout of cutting edge, high-performance, high-speed CMOS integrated circuits in foundry CMOS process nodes in 2nm, 3nm, 5nm, 7nm and lower nodes following industry best practices.
- Be responsible for and optimize all physical verification activities, including DRC, LVS, density analysis, and comprehensive tape-out checks.
- Drive the identification and resolution of complex physical design issues in layouts, mentoring junior engineers in established methodologies.
- Development of analog layouts, leading solving efforts and driving optimization for performance, area, and manufacturability.
- Cultivate effective teamwork across multi-functional teams, influencing project direction and ensuring alignment with organizational objectives.
- Excel in resource management, representing the team in technical discussions with customers
- Lead and perform full custom layout of analog/mixed-signal blocks such as op-amps, bandgaps, ADCs, DACs, LDOs, Voltage Regulators etc.
- Ensure design quality by adhering to matching, symmetry, and parasitic sensitivity requirements.
What we need to see:
- 2+ years of experience in high performance analog layout in advanced CMOS process.
- BE/M-Tech in Electrical & Electronics or equivalent experience.
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