Sr. FPGA Engineer, Amazon Leo

Amazon's Low Earth Orbit (LEO) initiative is building next-generation satellite communication systems to deliver high-speed broadband connectivity globally. Our silicon group develops cutting-edge FPGA prototypes and ASIC designs for advanced satellite communication systems.

Position Overview:

We are seeking an experienced Sr. FPGA Engineer to join our LEO silicon team. This role will contribute to the design, development, and verification of FPGA-based prototypes for our satellite communication systems, including transmit (Tx) and receive (Rx) signal processing chains.

Key Responsibilities:

• Lead FPGA design and implementation for complex digital signal processing systems in satellite communication applications
• Drive FPGA projects through the complete product development lifecycle from architecture to production
• Design, implement, and optimize DSP algorithms on FPGA platforms
• Perform hands-on lab work including hardware bring-up, debugging, and validation
• Collaborate with ASIC design teams to support RTL development and verification
• Mentor junior engineers and provide technical leadership on FPGA best practices
• Work with cross-functional teams including system architects, software engineers, and hardware engineers

Export Control Requirement:

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Basic qualifications

• Bachelor's degree in Electrical Engineering or a related field
• 7+ years of FPGA development experience
• Proven track record of completing full FPGA product cycles from concept through production
• Strong Digital Signal Processing (DSP) background with experience implementing DSP algorithms in hardware
• Excellent lab and debugging skills with experience in hardware bring-up and troubleshooting
• Proficiency with FPGA design tools (Xilinx Vivado, Intel Quartus, or similar)
• Strong knowledge of HDL languages (Verilog, VHDL, SystemVerilog)