Tensor SOC Performance Design Verification Engineer

Minimum qualifications:

• Master's degree in Electrical Engineering, Physics, Computer Engineering, Materials Science or related field or equivalent practical experience.

• 4 years of experience in the SOC design/verification.

• Experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem or Full chip level.

• Experience in mobile SOC performance model development, performance analysis, and workload characterization.

Preferred qualifications:

• Experience in CPU microarchitecture innovation.

• Knowledge of system software components, such as Linux, drivers, and runtime.

• Knowledge of performance analysis tools.

• Knowledge of CPU, GPU benchmark characterization.