Tata Semiconductor Manufacturing Private Limited (TSMPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.
TSMPL (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence
TSMPL is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six continents, with the mission 'To improve the quality of life of the communities we serve globally, through long term stakeholder value creation based on leadership with Trust.’
Responsibilities
Lead the transfer of 28–110 nm platform technologies, including end-to-end tape-out procedures, from partner facilities in collaboration with Fab Integration teams.
Define, establish, and standardize tape-out procedures for 28–110 nm technology platforms.
Collaborate closely with Fab teams (e.g., Lithography, PEI, Metrology) to implement and continuously enhance tape-out requirements.
Coordinate with vendors to define, validate, and maintain tape-out deliverables and data requirements.
Build, manage, and maintain tape-out–related technology information systems, including:
Layer naming conventions
Layer mapping
Boolean operations and design rules
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Develop and deploy automation solutions for tape-out workflows to improve efficiency and quality.
Own daily tape-out execution, coordinating activities from design-in through mask-in across internal and external stakeholders.
Essential Attributes
Proven ability to manage and mentor tape-out projects and teams.
Highly self-motivated, independent, and driven to succeed.
Strong communicator with an inclusive and collaborative style.
Effective team player, able to work across global, cross-functional teams.
Relationship-driven, supportive, and open to diverse perspectives.
Innovative and creative mindset with the ability to adapt quickly to change.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Engineering Science, IT Engineering, or equivalent.
Strong understanding of mask-related processes and semiconductor manufacturing flows.
Deep expertise in tape-out procedures and associated requirements.
Demonstrated ability to work effectively across cultures and geographies.
Strong teamwork orientation with an innovative and competitive mindset.
Desired Experience
10+ years of experience in the semiconductor industry, with a majority focused on tape-out and mask-related functions.
Proven track record of bringing new technologies into high-volume production.
Strong problem-solving skills, including use of Design of Experiments (DOE) and analytical methodologies.
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About The Business
Tata Semiconductor Manufacturing Private Limited (TSMPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.
TSMPL (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence
TSMPL is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six continents, with the mission 'To improve the quality of life of the communities we serve globally, through long term stakeholder value creation based on leadership with Trust.’
Responsibilities
Lead the transfer of 28–110 nm platform technologies, including end-to-end tape-out procedures, from partner facilities in collaboration with Fab Integration teams.
Define, establish, and standardize tape-out procedures for 28–110 nm technology platforms.
Collaborate closely with Fab teams (e.g., Lithography, PEI, Metrology) to implement and continuously enhance tape-out requirements.
Coordinate with vendors to define, validate, and maintain tape-out deliverables and data requirements.
Build, manage, and maintain tape-out–related technology information systems, including:
Layer naming conventions
Layer mapping
Boolean operations and design rules
Develop and deploy automation solutions for tape-out workflows to improve efficiency and quality.
Own daily tape-out execution, coordinating activities from design-in through mask-in across internal and external stakeholders.
Essential Attributes
Proven ability to manage and mentor tape-out projects and teams.
Highly self-motivated, independent, and driven to succeed.
Strong communicator with an inclusive and collaborative style.
Effective team player, able to work across global, cross-functional teams.
Relationship-driven, supportive, and open to diverse perspectives.
Innovative and creative mindset with the ability to adapt quickly to change.
Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Engineering Science, IT Engineering, or equivalent.
Strong understanding of mask-related processes and semiconductor manufacturing flows.
Deep expertise in tape-out procedures and associated requirements.
Demonstrated ability to work effectively across cultures and geographies.
Strong teamwork orientation with an innovative and competitive mindset.
Desired Experience
10+ years of experience in the semiconductor industry, with a majority focused on tape-out and mask-related functions.
Proven track record of bringing new technologies into high-volume production.
Strong problem-solving skills, including use of Design of Experiments (DOE) and analytical methodologies.
