STD Cell QA Engineer

Position Summary

About Samsung Semiconductor India Research (SSIR)

With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.

As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

• Strong knowledge and hands-on experience in QA methodologies for standard cell libraries, including test plan development, regression testing, and post-layout verification

• 4 to 13 years of experience in Standard Cell Circuit design of high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells, and clock cells.

• Strong knowledge and hands-on experience in developing environments and extracting post-layout netlists.

• Good understanding of CMOS device characteristics, design rules, latch-up, and electro migration.

• Proficiency in digital circuit simulation, design and optimization for better PPA.

• Hands-on experience in statistical/variation analysis.

• Contributing to the creation of cutting-edge semiconductor technologies that power a wide range of applications.