Staff Engineer - Formal Verification

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Responsibilities:

- Identify blocks suitable for applying Formal Verification

- Create Formal Test-plan for blocks identifying properties to be implemented and sign-off metrics

- Implementation and maintenance of Formal Verification environments in Chisel

- Applying various FV techniques to reduce complexity and prove correctness of DUT

- Debugging RTL to identify causes of failure scenarios

- Guide and train team members on effective usage of Formal Verification tools

- Develop/modify scripts to automate the verification process

- Review formal setups and proofs with design and verification teams

- Maintain and extend assertion libraries

Requirements: