via Career pages·3d ago
Sr. Engineer - PD
QuEST Global
Full-timeOn-sitedigital designclock domain crossingphysical designlogic synthesistcl scriptingsynopsys primetimedebuggingcommunication skillseco implementationsdc timing constraints creationphysicaltiming closurecmos fundamentalssynopsys design compilersetup/hold fixesstatic timing analysis
Location:Bengaluru, Karnataka, IndiaType:Full-timePosted:3d ago
Join our team as a Senior Engineer - Timing Design and drive innovation in digital design. Leverage your expertise in Static Timing Analysis, Logic Synthesis, and SDC debugging to solve complex engineering challenges. Collaborate with industry leaders and make a real impact in a dynamic, diverse environment. Shape the future of engineering with us!
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