Silicon Physical Design Engineer, Physical Verification, Cloud Silicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 4 years of experience with physical design verification flows and methodology such as DRC, LVS, PERC, ESD signoff, ERC, antenna, DFM, or dummyfill checks, using industry standard signoff tools (e.g., Calibre).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

• Experience with scripting languages such as Perl, Python, or Tcl.

• Experience with constraints, synthesis or clock tree synthesis (CTS).