Silicon DFT Engineer, Cloud Silicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, or a related field, or equivalent practical experience.

• 4 years of experience in DFT specification definition architecture and insertion.

• Experience with Application-Specific Integrated Circuit (ASIC) DFT synthesis, Static Timing Analysis (STA), simulation, and verification flow.

• Experience in silicon bring-up, debug, and validation of DFT features on ATE, debugging Automatic Test Pattern Generation (ATPG) patterns, compressed ATPG patterns, Memory Built-In Self-Test (MBIST) and Joint Test Action Group (JTAG) related issues.

• Experience with scan insertion, ATPG, gate level simulations and silicon debug, low power designs, BIST, JTAG, IJTAG tools and flow.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.

• Experience with silicon bring-up, ATE pattern debug, and failure analysis (diagnosis) to support yield improvement.

• Experience in multi-voltage, and multi-clock domain SoCs.

• Familiarity with generating and validating patterns for High-Speed I/Os (HSIO) and analog/mixed-signal IPs.

• Proficiency with a scripting language like Perl, Tcl or Python.