Silicon DFT Engineer, Cloud SIlicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.

• 2 years of experience in Automatic Test Pattern Generation (ATPG) methods.

• Experience with VLSI ASIC design flows.

• Experience in scripting (e.g., Python, Tcl, or Perl) to automate design flows and pattern validation tasks.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.

• 2 years of experience in the DFT flow, including implementation, scan insertion, and verification for complex ASIC/SoC designs.

• Experience scripting in Python or Perl or other related language.

• Experience with industry-standard DFT EDA tools.

• Ability in DFT validation, including pattern validation, Gate Level Simulations (GLS) simulation with timing, generating test cases, and debugging GLS.