Silicon Design For Test Engineer, Google Cloud

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, or a related field, or equivalent practical experience.

• 2 years of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools.

• Experience with scan insertion, ATPG, gate level simulations and silicon debug, low power designs, BIST, JTAG, IJTAG tools and flow.

• Experience in SoC designs and integration flows.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, or a related field.

• 1 year of experience with development projects in Very-Large-Scale Integration (VLSI).

• Experience scripting in Python or Perl or other related language.

• Experience or understanding of RTL design, SoC architecture, verification.