Silicon AI/ML DFT Engineer, Google Cloud

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.

• 3 years of experience in DFT specification and definition architecture and insertion.

• 2 years of experience with analog or mixed-signal IC design.

• Experience with DFT (Design for Test) technologies such as Scan, ATPG (Algorithmic Test Pattern Generation) and MBIST (Memory Built in Self Test.

• Experience with ASIC DFT synthesis, STA, simulation, and verification flow.

Preferred qualifications:

• Master's degree in Electrical Engineering, or a related field.

• Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, and debug of silicon issues, etc.).

• Experience in SoC cycles, including silicon bring-up and silicon debug activities.

• Experience in IP integration (e.g., memories, test controllers, TAP, and MBIST).

• Experience in fault modeling.