Senior Standard Cell and IP Application Engineer

Job Details:Job Description: We are looking for a Senior FIP Enablement and Support Engineer to join the Intel Foundry / DTP Customer Engineering team. The successful candidate brings deep expertise in Foundational IP (Standard Cell Libraries, GPIOs, PLLs, and Analog/Mixed-Signal IPs) and a strong understanding of IP QA, packaging, and release processes across Synopsys and Cadence design flows. In this role, the engineer will own customer-facing release delivery for Foundational IP, partner with FIP development teams on quality and integration, and serve as a key technical interface for Intel Foundry Services (IFS) ecosystem customers. The role requires sound technical judgment, the ability to navigate ambiguity, and the capacity to drive initiatives independently across multiple stakeholders and organizations. The candidate will work in close collaboration with Foundry Services teams, ecosystem partners, FIP development teams, and cross-org stakeholders across IPG, IFA, CDA, ADG, and PESG to deliver winning solutions for internal and external customers.

Primary Responsibilities

• Package, validate, and release high-volume Foundational IP collateral (Standard Cell libraries, PDK content, GPIOs, PLLs) to IP delivery portals and PLM systems including IPX, UCM, Teamcenter, and FLPR, meeting customer commit dates and quality targets.
• Drive end-to-end release execution for assigned IP families, including QA monitoring, packaging throughput, and adherence to SDLC/SDL certification requirements and Intel IP governance standards.
• Serve as the primary technical point of contact to internal and external customers for technical analysis, debug, and integration support; liaise with FIP development teams to drive resolution of quality and integration issues.
• Coordinate with Technical Program Managers (TPMs) and customer engineering leads on external release communication, customer-facing documentation, and release notes.
• Review IP performance and quality to ensure conformance with desired standards and targets; contribute to the development of QA flows, verification methodology, and release automation.
• Drive continuous improvement in packaging throughput, release tooling, and customer support workflows (e.g., Jira / JSM-based intake and triage).
• Develop customer-facing collateral, including application notes, white papers, integration guides, and other supporting documentation to improve customer experience and reduce support load.
• Mentor junior engineers and contribute to team-wide best practices in IP release and customer support.Qualifications:Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, with 4+ years of relevant industry experience, OR
• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, with 3+ years of relevant industry experience.