Senior Manager, Design Verification Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Senior Manager, Design Verification The Engineering Enablement team provides industry-leading tools, methodologies, and support to accelerate product development across the company. This position is part of the Digital Systems IP team within the Engineering Enablement organization. The IP team builds, curates and guides the development of IP across ADI.

We’re seeking a highly experienced, seasoned DV expert with experience in leading DV efforts for verification of different IP components and subsystems from scratch.

About the role

In this position the successful candidate will lead and be exposed to the entire product lifecycle from concept phase, through design, verification, implementation, and release of IP to various product teams. They will collaborate with the wider ADI technical community, which affords an opportunity to work with many business units in ADI with exposure to many technologies and products. This is a senior role with the opportunity to create real impact within the organization and build a promising career.

Responsibilities

• Verification of complex Digital designs and sub-systems using leading edge verification methodologies.

• Manage and mentor a high performing team of DV engineers, plan the DV strategy, manage the execution

• Defining verification strategy, test plans, tests and verification methodology for chip-level verification.

• Interact with various BU teams that use or explore ADIP IP. Understand the SoC use cases and enhance DV to support them