via Career pages·2w ago
Senior Lead Engineer - RTL
QuEST Global
Full-timeOn-sitedebuggingintegration supportproblem solvingdebug supportproblem-solvingasic programming languageveriloglogic synthesisglobal collaborationlow voltagetiming basicsrtl designsynthesismentoringtechnical decision makingsystem on a chipsta awarenessrtlinuxsystemverilogoracle cdcvoltage dropsoc architecture
Location:Hyderabad, Telangana, IndiaType:Full-timePosted:2w ago
Join our team as a Senior Lead Engineer - RTL and drive the design and development of advanced RTL for ASIC/SoC. Collaborate globally, mentor junior engineers, and ensure quality through integration, debugging, and technical leadership. Shape the future of SoC design with your expertise in Verilog, SystemVerilog, and SoC architecture.
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