Senior Design Verification Infrastructure Engineer - VIPs and Testbench

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

Join SiFive’s Design Verification Infrastructure team to develop and maintain the Verification Platform VIPs, AIPs, and other testbench components used across SiFive. An ideal candidate will be a strong Design Verification engineer with a solid understanding of software engineering. You will be expected to collaborate with Design Verification engineers to develop reusable testbench components and integrate them within SiFive’s Chisel-based Verification Platform..

Responsibilities:

- Architect, develop, and maintain the Verification Platform to provide a common infrastructure that scales with the growth of SiFive for Design Verification and other verification and validation activities

- Develop Verification Platform libraries for expressing verification intent in Scala with Chisel, including test harnesses, stimulus, scoreboards, and other generators

- Develop Verification Platform VIPs, AIPs, and other testbench components using System Verilog, UVM, and other related technologies