Principal Engineer, High-Speed IO & Memory Systems

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

About the Role

SambaNova’s DataScale® platform pushes the limits of AI compute—and the integrity of every high-speed interface and memory subsystem is critical to its performance in the field. As a Principal Engineer, Post-Silicon Validation, you will own the bring-up, debug, and validation of high-speed IO and memory subsystems from first silicon through customer deployment.

This is a deeply technical, high-ownership role for an engineer who thrives on hard debug problems. You will operate across silicon, board, and software layers—leading cross-functional teams to root cause, driving issues to resolution, and building the infrastructure that makes future bring-up cycles faster and more reliable. If you have a bias for action, a sharp analytical mind, and the kind of depth that comes from years in post-silicon validation, this role was built for you.

What You’ll Do

System Bring-Up & Validation

• Own post-silicon bring-up and validation of high-speed IO and memory subsystems, including characterization, functional validation, stress testing, and performance analysis.

• Drive system power-on readiness—including debug infrastructure, tooling setup, and contingency planning—to enable first-pass bring-up success.

Debug & Cross-Functional Execution

• Lead system-level debug across silicon, board, and software layers, driving complex issues to verified root cause and resolution.