Principal Engineer, Analog Design

We are seeking an experienced Principal Analog Design Engineer to own and drive the architecture and design of high-performance analog/mixed-signal IP used across multiple SoCs. This role will focus on signal chain IP (ADCs, DACs, amplifiers, sensor interfaces) or power management IP (LDOs, DC-DCs, charge pumps, bandgaps).

About GlobalFoundries

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com

Introduction:

We are seeking an experienced Principal Analog Design Engineer to own and drive the architecture and design of high-performance analog/mixed-signal IP used across multiple SoCs. This role will focus on signal chain IP (ADCs, DACs, amplifiers, sensor interfaces) or power management IP (LDOs, DC-DCs, charge pumps, bandgaps).

Essential Responsibilities:

- Develop analog and mixed signal IP for products developed by MIPS covering industrial, automotive and other end-equipment. Develop high performance analog and mixed signal IP covering signal chain IPs such as ADC (SAR, pipeline, delta-sigma), DACs, precision amplifiers, clocking, sensor interfaces or develop power management IP such as LDOs, DC-DC converters (buck-boost, buck, boost), bandgap references, charge pumps, power sequencing and monitoring circuits like POR, power good, power glitch etc.

- Strong demonstrated design implementation ability to perform transistor-level design using advanced CMOS technology nodes. Lead schematic design, simulation, and verification across PVT corners. Strong understanding of analog design fundamentals and technology aspects. Understanding and knowledge of design implementation for robustness covering process variation, mismatch, noise and reliability issues for advanced process nodes.

- Cross-collaboration across disciplines working closely with digital, system, layout, and product teams. Strong understanding of system level issues, noise, performance, area trade-offs, reliability considerations. Provide technical leadership during architectural analysis.

- Silicon Execution to support top-level integration, verification and tape-out. Lead silicon bring-up, characterization and bring-up of the IPs designed. Drive continuous improvements and lessons learnt for next-generation IP for re-use and scalability