ASIC Engineering Technical Leader | RTL development (Verilog, SystemVerilog, VCS, Spyglass, CDC, Formal verification) | Exp - 12+ years

Meet the Team

Come join us and be part of the Cisco SiliconOne team and take part in crafting Cisco's groundbreaking Enterprise and Service Provider solutions by crafting some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a rare combination of a startup culture with the benefits of working for the top tier networking company in the world!

Your Impact

Cisco SiliconOne team is looking for an expert and talented ASIC Engineering Technical Leader. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.

- Architectural work: In-depth understanding of the architecture, and identification of problems and solutions. Oversees the definition, architecture and design, in addition to making design decisions.

- Drives design solutions across the business. Ensure culture of code reviews and postmortems.

- All aspects of implementation: Specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for low power and area; highlighting issues and standard methodologies for power and area optimization.

- Review complex designs and makes recommendations for improvements.

- Creates guidelines and standards.

- Document and improve standard methodologies to make product successful.

- Act as the design lead, owning and leading all the above aspects, including driving the technical decisions made at the program level with rest of the design teams, conducting weekly design meetings, sync-ups with stake holders and cross functional teams like Architecture, DV, PD, Emulation, SW, PSV and Silicon Operations.

Minimum Qualifications

- BS/MS and 12+/10+ years respectively of hands-on experience in large-scale, high-performance ASIC.

- Architecture and implementation specification creation.

- RTL development (Verilog, SystemVerilog, VCS, Spyglass, CDC, Formal verification)