ASIC Design Verification Engineer, Silicon Engineering

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 4 Years of experience verifying digital logic at RTL level using SystemVerilog or C/C++.

• Experience creating and using verification components and environments in standard verification methodology.

• Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

• Experience in low-power design verification.

• Experience with Interconnect Protocols (e.g., AHB, AXI, ACE, CHI, CCIX, CXL).

• Experience in one or more of the following: Caches Hierarchies, Coherency, Memory Consistency Models, DDR/LPDDR, PCIe, Packet Processors, Security, Clock and Power Controllers.