Analog/RF Layout Senior Engineer

## Company:

Qualcomm India Private Limited

## Job Area:

Engineering Services Group, Engineering Services Group > Layout Engineer

General Summary:

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.

OR Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. OR High School diploma or equivalent and 8+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.

• 4+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap).

Analog/RF Layout Staff Engineer 8 to 12 Years

QCT RF/Analog design group is seeking an experienced Layout Engineer to fulfill both block and project lead level roles working in a large team environment. Responsibilities will vary depending on experience and expertise. The layout designer will be responsible for physical design of RF and analog circuits in a fast-paced environment. Detail custom layout including floorplan, placement, routing, verification, and release of final database for high frequency RF circuits. Provide accurate schedule and plan to meet project milestone deadlines, debug complex verification errors, mentor junior layout designers, able to lead a team to deliver high quality layout that meets design requirements, understanding of hierarchical planning and integration, chip design from top down and bottom up through Tapeout. The layout designer should have strong analog layout fundamentals and focused exposure to handling multi voltage domain circuit layouts, latchup and ESD aware layout development strategy.